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Bookstand Publishing Presents...

'Embedded Design Using Programmable Gate Arrays'

by Dennis Silage

 

If this book is available as a printed book it will be indicated below. You MUST check the "Printed Copy" box if applicable. This printed book is a paperback format unless noted as a hardcover in the description. If you do not check this box or this box is not present, you are purchasing a DOWNLOAD of this book. The file will be downloaded to your computer. No hard copy will be sent unless you check the appropriate box.

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Printed Edition Price: $34.95
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About Our Book:
Embedded Design Using Programmable Gate Arrays Dennis Silage This text describes modern embedded processing systems using the Field Programmable Gate Array. This new paradigm in embedded design utilizes the Verilog Hardware Description Language behavioral synthesis of controller and datapath constructs and the Finite State Machine for Digital Signal Processing, communications and control with the FPGA, external hard core peripherals, custom internal soft core peripherals and the soft core processor. Review materials and references for DSP place the embedded design projects in perspective. This text features the Xilinx Spartan-3E Starter Board, the Xilinx ISE WebPACK EDA, Xilinx LogiCORE blocks and the Xilinx PicoBlaze soft core processor. Embedded Design Using Programmable Gate Arrays is intended as a supplementary text and laboratory manual for undergraduate students in a contemporary course in digital logic and embedded systems. Professionals who have not had an exposure to the fine grained FPGA, the Verilog HDL, an EDA software tool or the new paradigm of the controller and datapath and the FSM will find that this text and the Xilinx Spartan-3E Starter Board provides the necessary experience in this emerging area of electrotechnology.

For more information, you can visit the author's website at www.dennis-silage.com/embeddes.htm

Number of pages:321
About the Author:
Dennis Silage is a Professor in the Department of Electrical and Computer Engineering at Temple University. He is a Senior Member of IEEE and Director of the System Chip Design Center at Temple University which researches the application of programmable gate arrays in digital signal processing and digital communication.

Email: silage@temple.edu

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